Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

Reexamination Certificate

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C365S185210, C365S205000, C365S207000

Reexamination Certificate

active

07362623

ABSTRACT:
A semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged therein; and a sense amplifier circuit configured to read data of the memory cell array, wherein a comparison operation is performed between read out data from the memory cell array and externally supplied expectance data in the sense amplifier circuit.

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patent: 6636998 (2003-10-01), Lee et al.
patent: 6707719 (2004-03-01), Shibata et al.
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patent: 6859379 (2005-02-01), Sakui
patent: 7206241 (2007-04-01), Kido et al.
patent: 2004/0205429 (2004-10-01), Yoshida et al.
patent: 2000-195280 (2000-07-01), None
patent: 2001-93288 (2001-04-01), None

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