Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S210100, C365S210150

Reexamination Certificate

active

07903449

ABSTRACT:
A semiconductor memory device (e.g. DRAM) is constituted of a memory cell array including a plurality of memory cells, a plurality of word line drivers, a plurality of sense amplifiers, and a plurality of dummy capacitors. The memory cells, each of which includes a transistor and a capacitor, are positioned at intersections between the word lines and the bit lines. The first electrodes of the capacitors are connected to the transistors in the memory cells. The first electrodes of the dummy capacitors are connected together and are supplied with a second potential (e.g. VDD or VSS). The second electrodes of the dummy capacitors are connected together with the second electrodes of the capacitors of the memory cells and are supplied with a first potential (e.g. VPL). The dummy capacitors serve as smoothing capacitances for the plate voltage VPL so as to reduce plate noise.

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patent: 5682343 (1997-10-01), Tomishima et al.
patent: 7196945 (2007-03-01), Kato
patent: 7379316 (2008-05-01), Rajan
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patent: 11-214649 (1999-08-01), None
patent: 2000-348488 (2000-12-01), None
patent: 2003-332532 (2003-11-01), None
patent: 2005-167039 (2005-06-01), None

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