Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1996-02-26

1997-09-02

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Signals

3652335, 36518905, G11C 700

Patent

active

056639120

ABSTRACT:
A DRAM is disclosed in which column address COL1 is taken in when signal /CAS falls at time t1, data D1 is output after period t.sub.CD has elapsed from the rise of signal /CAS at time t2, and output of data D1 is stopped after period t.sub.CDH has elapsed from the fall of signal /CAS at time t3. Therefore, upon interleave operations, data collision does not occur at the rise and fall of signal /CAS.

REFERENCES:
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patent: 5361230 (1994-11-01), Ikeda et al.
patent: 5384735 (1995-01-01), Park et al.
patent: 5414672 (1995-05-01), Ozeki et al.
patent: 5436865 (1995-07-01), Kitazawa
patent: 5553024 (1996-09-01), Furuyama

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