Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S173000

Reexamination Certificate

active

07359234

ABSTRACT:
A semiconductor memory device includes a plurality of memory cells using a current flowing through a wiring. A plurality of first write lines are electrically or magnetically or electrically and magnetically connected to the memory cells and provided along a first direction. A first connection line electrically connects at least two of the first write lines each other.

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A. Bette, et al., “A High-Speed 128Kbit MRAM Core for Future Universal Memory Applications”, 2003 Symposium on VLSI Circuits Digest of Technical Papers, Jun. 2003, pp. 217-220.
Mark Durlam, et al., “A 1-Mbit MRAM Based on 1T1MTJ Bit Cell Integrated With Copper Interconnects”, IEEE Journal of Solid-State Circuits, vol. 38, No. 5, May 2003, 769-773.
T. Inaba, et al., “Resistance Ratio Read (R3) Architechture for a Burst Operated 1.5V MRAM Macro”, IEEE 2003 Custom Integrated Circuits Conference Digest of Technical Papers, pp. 399-402, Sep. 2003.

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