Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2011-03-01

2011-03-01

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S233100, C365S233110

Reexamination Certificate

active

07898891

ABSTRACT:
A semiconductor memory device includes a charge pumping circuit, a level sensor, an oscillator, and a pumping control signal generator. The charge pumping circuit performs a negative-pumping operation to an external power in order to generate an internal voltage having a level lower than the external power. The level sensor senses a level of the internal voltage corresponding to a level of an adjusted reference voltage during a refresh mode. The oscillator generates a period signal in response to a sensing signal of the level sensor. The pumping control signal generator controls the operation of the charge pumping circuit in response to the period signal.

REFERENCES:
patent: 5990729 (1999-11-01), Kozuka et al.
patent: 2007/0153611 (2007-07-01), Lee
patent: 1020040100439 (2004-12-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Sep. 26, 2009.

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