Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Including signal comparison

Reexamination Certificate

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C365S189080, C365S230030

Reexamination Certificate

active

07936613

ABSTRACT:
A charge driving circuit and a discharge driving circuit occupy a relatively small area and maintain driving force in a semiconductor memory device having a plurality of banks. The semiconductor memory device includes multiple banks, a common discharge level detector configured to detect a voltage level of internal voltage terminals on the basis of a first target level in response to active signals corresponding to the respective banks, and a discharge drivers assigned to the respective banks. The discharge drivers are configured to drive the internal voltage terminals to be discharged in response to the respective active signals and respective discharge control signals outputted from the common discharge level detector.

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