Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1993-01-08

1994-12-20

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, 36523006, 371 102, G11C 800, G11C 1300

Patent

active

053750900

ABSTRACT:
A semiconductor memory device of the present invention includes a plurality of blocks. Each of the blocks includes: a memory cell group including redundancy cells; a memory cell group selection decoder for, in response to an address signal indicative of an address in the memory cell group, selecting a memory cell having the address; and a redundancy decoder in which any address included in a memory cell group in any one of the blocks except for the block to which the redundancy decoder belongs can be registered, the redundancy decoder outputting a prescribed signal to all of the memory cell group selection decoders in the respective blocks, when the address indicated by the address signal is identical with the registered address. Each the memory cell group selection decoding comprising: forcedly selecting means for, when the prescribed signal is supplied from the redundancy decoder in the block to which the memory cell group selection decoder belongs, forcedly selecting the memory cell group in the block; and forcedly non-selecting means for, when the prescribed signal is supplied from the redundancy decoder in one of the blocks except for the block to which the memory cell group selection decoder belongs, forcedly not selecting the memory cell group in the block to which the memory cell group selection decoder belongs.

REFERENCES:
patent: 4837747 (1989-06-01), Dosaka et al.

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