Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Semiconductive

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365104, G11C 1140

Patent

active

044320736

ABSTRACT:
An insulated gate field-effect transistor is formed along a surface of a semiconductor substrate, and a polycrystalline silicon layer serving as a resistive element is formed over the gate electrode of the field-effect transistor via a thick insulating layer. The polycrystalline silicon layer is connected at one end to the drain region of the field-effect transistor and at the other end to a line for reading data. The gate electrode of the field-effect transistor is connected to a line for writing data, and the source region is connected to a common line.

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Chatterjee et al., "Circuit Optimization of the Taper Isolated Dynamic Gain RAM Cell for VLSI Memories", IEEE Solid-State Circuits Conference, pp. 22-27, dated 2/14/79.

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