Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-03-07

1996-06-18

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Ferroelectric

365222, 365230030, 365149, G11C 1122, G11C 11406

Patent

active

055285350

ABSTRACT:
A memory matrix--which comprises memory cells arranged in matrix, each made up of a ferroelectric capacitor and an address selection MOSFET--is divided for each word line into a plurality of memory blocks. Each of the memory blocks is provided with a mode storage circuit that stores a DRAM mode (volatile mode) or NV mode (non-volatile mode) in one-to-one correspondence for each memory block, and with a refresh operation count circuit that counts for each memory block the number of times the refresh operations is performed consecutively. During an n-th refresh operation (where n is a predetermined number of times), a memory access is made to temporarily change the plate voltage of the ferroelectric capacitor from one voltage to another and at the same time the mode storage circuit is changed from the DRAM mode to the NV mode. When a read or write operation to and from a memory cell in the memory block is performed, the mode storage circuit is changed from the NV mode to the DRAM mode. The refresh operation is omitted for the memory block that was set to the NV mode according to the stored information in the mode storage circuit.

REFERENCES:
patent: 5027327 (1991-06-01), Kobayashi et al.
patent: 5299168 (1994-03-01), Kang
patent: 5305255 (1994-04-01), Rubinstein
patent: 5373475 (1994-12-01), Nagase
patent: 5381379 (1995-01-01), Fukumoto
patent: 5455786 (1995-10-01), Taueuchi et al.
Technical Report (pp. 122-125)-Semiconductor World Dec. 1991 Application of Ferroelectric Thin Film to Integrated Circuits (pp. 1-10).

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