Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Testing

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Details

3652257, 365194, G11C 700

Patent

active

055965385

ABSTRACT:
In a semiconductor memory device, data required for controlling design margins and access time is stored at a selected fuse ROM array and a vendor test is performed. By using the information obtained by the vendor testing, fuse ROM arrays are programed, so that design margins and access time can be easily varied according to semiconductor memory device, thereby enhancing the device performance. Moreover, by additionally adapting a multiplexer, a plurality of fuse ROM arrays can be programmed by using a few pads.

REFERENCES:
patent: 4281398 (1981-07-01), McKenny et al.
patent: 5305267 (1994-04-01), Haraguchi et al.
patent: 5355344 (1994-10-01), McClure

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