Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

36518901, 371 101, 371 102, 371 103, G11C 700, G11C 1140

Patent

active

052672050

ABSTRACT:
A semiconductor memory device with a redundant configuration according to the present invention includes a roll call circuit which turns an output signal of a sense amplifier compulsorily to a signal of a predetermined logical level when a portion constituting the redundant configuration is accessed, and turns an output signal of the output control circuit to that of the same predetermined logical level when a write instruction is given outside a normal level. Whether a spare memory cell is accessed can be checked in every output and the redundant configuration can operate with stability.

REFERENCES:
patent: 4567580 (1986-01-01), Varshney
patent: 4573146 (1986-02-01), Graham et al.
patent: 4984205 (1991-01-01), Sugibayashi
patent: 5008857 (1991-04-01), Mizoguchi
patent: 5124949 (1992-06-01), Morigami

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