Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1998-02-25

2000-06-13

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

36518901, G11C 1300

Patent

active

060757388

ABSTRACT:
A flash EEPROM has a memory cell array of memory cells. Each memory cell includes a floating gate electrode, a source, a drain and a control gate electrode. A data value is stored in a memory cell by storing a charge in its floating gate electrode. A control circuit controls voltages applied to the control gate electrode, the source and the drain of the memory cells. A charge which is greater than a charge amount corresponding to a desired data value is stored in the floating gate electrode of a memory cell. In the write mode, charge is drained from the floating gate electrode. A write determining circuit checks the amount of charge remaining in the floating gate electrode after charge has been drained from it. The write determining circuit disables the write operation when the amount of charge remaining in the floating gate electrode reaches the charge amount corresponding to the desired data value.

REFERENCES:
patent: 5029130 (1991-07-01), Yeh
patent: 5473568 (1995-12-01), Okamura

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