Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1983-09-26

1986-04-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Data refresh

365189, G11C 700

Patent

active

045817200

ABSTRACT:
A dynamic memory having single element storage cells. A plurality of gate circuits are connected to the column lines of the storage cell array at both ends of the column line. A plurality of sense amplifiers are disposed along both ends of the column lines and connected to the gate circuits. In accordance with switching of the gate circuits, a portion of the sense amplifiers are coupled with a portion of the column lines to perform a refresh operation and read or write operations for the storage cells connected thereto. Also, the remaining sense amplifiers are coupled with the remaining column lines to perform only the refresh operation of the storage cells connected to the remaining column lines.

REFERENCES:
patent: 4203159 (1980-05-01), Wanlass
P. T. Wu, "Read/Write Dynamic Memory Using Two Devices Per Cell and Having Internal Refresh", IBM Technical Disclosure Bulletin, vol. 23, No. 10, Mar. 1981, pp. 4620-4621.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2069747