Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

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365208, 36518911, 327 56, G11C 700

Patent

active

055196624

ABSTRACT:
In a semiconductor memory device, amplification of data is realized with a high speed without influences of fluctuations at fabrication. Potentials of a common data line pair are set at a reference voltage by current negative feedback of differential amplifiers. In this way signal amplitude in the common data line pair is decreased. A current from a memory cell is transformed into a voltage by transistors in a negative feedback loop. Even if there are fluctuations or an offset voltage in the differential amplifiers, it is possible to decrease the signal amplitude in the common data line pair and to realize a high speed data amplification with low electric power consumption.

REFERENCES:
patent: 4962482 (1990-10-01), Jinbo
patent: 5029138 (1991-07-01), Iwashita
1992 IEEE International Solid State Circuit Conference, Digest of Technical Papers, pp. 208-209, "A 7ns 140 mW 1 Mb CMOS SRAM with Current Sense Amplifier" by K. Sasaki et al.

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