Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1997-05-07
1998-07-14
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Bad bit
365201, G11C 700
Patent
active
057814848
ABSTRACT:
Normal column selection signal switching device (20) is provided to switch a signal outputted from normal column selection signal generating device (19) in response to a test-mode signal (TMC1). Even if the normal column selection signal generating device (19) outputs a signal to disable a normal column decoder (3), the normal column selection signal switching device (20) switches the signal to enable the normal column decoder (3) to operate in the test operation. Having this configuration, a semiconductor memory device enables writing of data into all the normal memory cells even after some of the normal memory cells are replaced by spare memory cells.
REFERENCES:
patent: 5416740 (1995-05-01), Fujita et al.
patent: 5566128 (1996-10-01), Magome
patent: 5596536 (1997-01-01), Koh
patent: 5617364 (1997-04-01), Hatakeyama
Asakura Mikio
Tanaka Koji
Yasuda Ken'ichi
Mitsubishi Denki & Kabushiki Kaisha
Yoo Do Hyun
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1889718