Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

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Details

365154, 365149, 36518909, G11C 700

Patent

active

057814821

ABSTRACT:
A semiconductor memory having a function that set/reset information is directly written into each of the memory cells is disclosed. The semiconductor memory device of the present invention comprises word lines, bit lines, set/reset lines and switch circuits each of which is coupled to one of the set/reset lines for applying either a first potential or a second potential in response to a control signal. The semiconductor memory device further includes memory cells for storing data therein. Each of the memory cells has a first node coupled to one of the word lines, a second node coupled to one of the bit lines, a third node coupled to receive the first potential, and a forth node coupled to one of the set/reset lines.

REFERENCES:
patent: 5517445 (1996-05-01), Imai
patent: 5574695 (1996-11-01), Suzuki
patent: 5646885 (1997-07-01), Matsuo

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