Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1994-06-09

1996-07-09

Meier, Stephen D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257394, 257202, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

055347240

ABSTRACT:
A semiconductor memory device according to the present invention comprises a substantially rectangular memory cell array region formed on a surface of a semiconductor substrate, a bit line balancing circuit disposed adjacent to a predetermined side of the memory cell array region and having a first circuit layout pattern, a bit line potential supply circuit disposed outside the bit line balancing circuit remote from the memory cell array region and having a second circuit layout pattern and a first dummy wiring region disposed outside the bit line potential supply circuit remote from the memory cell array region and having a circuit layout pattern substantially the same as the first layout pattern. With this, reduction of mutual conductance of transistors constituting a peripheral circuit can be prevented and reduction of read/write rate of the semiconductor memory device and malfunction thereof are also prevented.

REFERENCES:
patent: 4891792 (1990-01-01), Hanamura

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