Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Serial read/write

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Details

365236, 365239, 365240, G11C 700, G11C 800

Patent

active

054522552

ABSTRACT:
There is provided a semiconductor memory device having output ports for serially accessing memory cells connected to a plurality of select lines, comprising: a decode counter adapted to be supplied with an initial value to count up to generate a plurality of counter address signals to output first decode signals obtained by decoding the counter address signals; and a serial decoder adapted to be supplied with the first decode signals respectively outputted from the decode counter to decode them to output second decode signals for selectig any one of the select lines.

REFERENCES:
patent: 5042014 (1991-08-01), Pinkham et al.
patent: 5117388 (1992-05-01), Nakano et al.
patent: 5239509 (1993-08-01), Ikawa et al.
patent: 5260905 (1993-11-01), Mori
patent: 5311468 (1994-05-01), Anderson

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