Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-10-04

1997-11-18

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, 36523006, G11C 700

Patent

active

056894635

ABSTRACT:
A NAND type EEPROM includes block selecting circuits (BSC1 to BSC6) configured to keep a defective block non-selected in the mode for simultaneous writing and simultaneous erasure of all blocks (BLK1-BLK4) to test the device, after the defective block is replaced by a redundant block (SBLK1, SBLK2). This prohibitor a high voltage boosted by a booster circuit for simultaneous writing and simultaneous erasure of all blocks from being applied to the defective block. The block selecting circuits output a "NON-SELECT" signal when a signal instructing simultaneous writing or simultaneous erasure of all blocks is supplied after corresponding fuses (fa-fh)are blown or cut off. Therefore, once a defective block is replaced by a redundant block, there never occurs a voltage drop which may otherwise be caused by leakage of current from the defective block, and the device can be used as a non-defective NAND type EEPROM in all modes including the test mode.

REFERENCES:
patent: 5083294 (1992-01-01), Okajima
patent: 5295102 (1994-03-01), McClure
patent: 5307316 (1994-04-01), Takemae
patent: 5349557 (1994-09-01), Yoshida
European Search Report, Appl. No. 95115639.7 dated Feb. 29, 1996.

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