Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1993-05-28

1996-01-23

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, 371 103, G11C 700

Patent

active

054870399

ABSTRACT:
A semiconductor memory device with a redundant circuit architecture having improved repairing efficiency and improved yield comprising a memory array (1) divided between a number of subarrays, in which a number of memory cells MCL are arrayed in matrix form; circuits (6-8) and (11-13), which select the subarrays SUB0-SUB7 based on the address signal in order to drive the cell with the specified address; a number of spare word sets SWLS, situated to correspond to the subarrays SUB0-SUB7; a number of fuse sets (3A), which are situated to correspond to the spare word sets SWLS, and which output signals used to replace the selection drive circuit being driven with a spare word set SWLS; and a circuit (3A), used to switch as desired between the output lines for the output signals of the fuse sets; wherein the aforementioned output lines are installed to correspond to the spare word sets (SWLS), and the selection and drive circuits are allowed to select the subarrays SUB0-SUB7 corresponding to the output lines.

REFERENCES:
patent: 4987560 (1991-01-01), Hamano et al.
patent: 5195057 (1993-03-01), Kasa et al.
patent: 5386386 (1995-02-01), Ogihara

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