Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-02-24

2000-07-04

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Bad bit

36523006, 365194, G11C 700

Patent

active

060848065

ABSTRACT:
A semiconductor memory device (100) includes a normal cell array and a redundant cell array. When a normal cell array location is to be replaced by selecting the redundant cell array, a first circuit (120) outputs a one-shot signal (PBLST) to a redundant block selection circuit (118). The redundant block selection circuit (118) activates a redundant precharge stop signal (RDPBL) without waiting for a redundant cell decoder (110) decoding result. The redundant cell decoder (110) result indicates whether the redundant cell array is selected or not selected. Accelerated accesses to the redundant cell array can result, improving overall access speed for the semiconductor memory device (100).

REFERENCES:
patent: 5825699 (1998-10-01), Tanaka
patent: 5841711 (1998-11-01), Watanabe

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