Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1985-07-26

1987-07-14

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365205, G11C 702

Patent

active

046807357

ABSTRACT:
A sense amplifier comprising a flip-flop circuit is provided for each bit line pair. A first transistor is connected between the flip-flop circuit and V.sub.DD power source. A second transistor is connected between the flip-flop circuit and ground. A control signal for controlling the active state of the flip-flop is applied to the gate of the first transistor, with a minimum time delay. The control signal is also applied to the gate of the second transistor, with a time delay corresponding to that caused by the word line. The timing for rendering each flip-flop circuit in the active state is substantially coincident with the optimum timing of a change in potential on each corresponding bit line.

REFERENCES:
patent: 4169233 (1979-09-01), Haraszti
patent: 4558241 (1985-12-01), Suzuki et al.
K. Natori, et al., "A 34 ns 256K Dram," IEEE International Solid-State Circuits Conference, ISSCC Digest of Technical Papers, p. 232-233, 1983.

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