Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-05-31

1992-05-05

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365203, 36523009, G11C 1140

Patent

active

051114348

ABSTRACT:
A semiconductor DRAM comprising a circuit arrangement in which an undesirable effect due to the coupling capacitance between bit lines thereof can be reduced, comprises: a plurality of bit lines arranged parallel to each other; a plurality of word lines intersecting each plurality of bit lines; a plurality of upper sense amplifiers respectively connected to uppermost ends of each of odd numbered bit line pairs; a plurality of lower sense amplifiers respectively connected to lowermost ends of each of even numbered bit line pairs; a memory cell array having a plurality of memory cells arranged sequentially in a diagonal line within selected locations of a plurality of spacings formed by intersection of the bit lines and word lines, the memory cell being disposed at every fourth spacing in a row and a column; first latching means for activating said upper sense amplifiers, the latching means being connected with said upper sense amplifiers; and second latching means coupled with said lower sense amplifiers, said first latching means and said second latching means being alternately activated to each other.

REFERENCES:
patent: 4916667 (1990-04-01), Miyabayashi et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1418480