Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1998-06-19

2000-07-25

Nguyen, Hiep T.

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

711103, 711169, 711173, 711217, 711218, 711219, 36518902, 36523003, 36523004, 36523005, 36523008, 36523009, G06F 1202

Patent

active

060947012

ABSTRACT:
A semiconductor memory device is provided with a determination circuit and an address adder. The determination circuit determines whether a read start address selects upper-address banks B5-B8 or lower-address banks B1-B4. When the determination circuit determines that the lower-address banks are selected, the address adder increments a column address by 1. From the upper-address banks, data are read from the columns corresponding to the read start address. From the lower-address banks, data are read from the columns that are next to the columns corresponding to the read start address. Even when the upper-address banks are designated by the read start address, the data output from the lower-address banks corresponds to the next columns. Since there is no busy time during data output, successive access is enabled and the access cycle time can be as short as possible.

REFERENCES:
patent: 5257235 (1993-10-01), Miyamoto
patent: 5297029 (1994-03-01), Nakai et al.
patent: 5532970 (1996-07-01), Butler et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1343785