Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Testing

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Details

365207, 371 211, 371 212, G11C 702, G06F 1116

Patent

active

050293303

ABSTRACT:
In a multibit test mode for a dynamic RAM, a plurality of complementary data lines are simultaneously connected to the complementary common data lines and the levels of noninversion signal lines and inversion signal lines of the complementary common data lines are compared with a predetermined reference voltage, respectively.

REFERENCES:
patent: 4138740 (1979-02-01), Itoh
patent: 4916700 (1990-04-01), Ito et al.

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