Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

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G11C 700

Patent

active

059634880

ABSTRACT:
The semiconductor memory device is provided with a readout mode in which a plurality of word data are read out from a memory cell array as a group and are subjected to a time division operation to be continuously output. The device includes a redundant unit which replaces a bit data of a defective bit present in the respective word data with a replacement data on a basis of the word data during said readout mode, thereby reconfiguring the plurality of word data.

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patent: 5475648 (1995-12-01), Fujiwara
patent: 5550394 (1996-08-01), Sukegawa et al.
patent: 5619473 (1997-04-01), Hotta

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