Semiconductor memory device

Static information storage and retrieval – Read/write circuit – For complementary information

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365203, G11C 700

Patent

active

046252983

ABSTRACT:
A semiconductor memory device with a static Random Access Memory having an internally generated timing system, which includes a detecting circuit intended to detect the completion of operation of a sense amplifier; and a control circuit intended to place the word lines of the memory in an unselected state upon reception of the output signal from the detecting circuit.

REFERENCES:
patent: 4103345 (1978-07-01), Suzuki et al.
patent: 4409674 (1983-10-01), Takahashi
Yasuda et al, "1982 Symposium on VLSI Technology, Digest of Technical Papers", pp. 14-15, (1982).

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