Static information storage and retrieval – Read/write circuit – Erase
Patent
1981-11-13
1984-08-14
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
371 21, G11C 1140
Patent
active
044660812
ABSTRACT:
A semiconductor memory device is constituted by a MOS transistor having a floating gate for storing data. An erase gate, a portion of which is under a part of the floating gate, is arranged on the MOS transistor to discharge electrons from the floating gate. The MOS transistors are arranged in a matrix form in which the erase gates of all the MOS transistors are commonly connected and a data erase voltage is applied to the erase gates to erase the data.
REFERENCES:
patent: 4099196 (1978-04-01), Simko
patent: 4203153 (1980-05-01), Frohman-Bentchkowsky et al.
patent: 4357685 (1982-11-01), Daniele et al.
patent: 4375087 (1983-02-01), Wanlass
1980 IEEE International Solid-State Circuit Conference 152 (Feb. 1980) A 16Kb Electrically Erasable Nonvolatile Memory.
Fears Terrell W.
Tokyo Shibaura Denki Kabushiki Kaisha
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