Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-07-02
1995-02-07
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Bad bit
365201, 365230030, G11C 700, G11C 2900
Patent
active
053880765
ABSTRACT:
The semiconductor memory device according to this invention includes both ROM cells and RAM cells mixed on one line of memory cells. The semiconductor memory device further has a redundant ROM bit line and a redundant RAM bit line. An address on the redundant ROM or RAM bit line is selected in accordance with whether the corresponding address on a defective line to be replaced with the redundant ROM or RAM bit line is a RAM or a ROM. Therefore, it is possible to redundantly recover a defective line including both ROMs and RAMs. Further, a semiconductor memory device including ROMs and RAMs mixedly can be produced in a high yield.
REFERENCES:
patent: 4575819 (1986-03-01), Amin
patent: 4855803 (1989-08-01), Azumai et al.
LaRoche Eugene R.
Nguyen Tan
Sharp Kabushiki Kaisha
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