Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1986-04-02
1987-04-07
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
365210, 365189, G11C 1140
Patent
active
046566090
ABSTRACT:
A semiconductor memory device includes a redundancy decoder circuit. The redundancy decoder circuit includes FAMOS transistors to which an address pattern, corresponding to an address of a defective memory cell to be replaced by a redundancy memory cell, is written at the floating gates of the FAMOS transistors. The FAMOS transistors are depletion type. Control gates thereof receive a voltage having ground level or lower during a usual memory access mode.
REFERENCES:
patent: 4313106 (1982-01-01), Hsu
patent: 4422161 (1983-12-01), Kressel et al.
patent: 4489402 (1984-12-01), Saitoh et al.
Dov Frohman-Bentchkowsky, FAMOS-A New Semiconductor Charge Storage Device, Solid-State Electronics, 1974, vol. 17, pp. 517-529.
Hagihara Ryoji
Higuchi Mitsuo
Fears Terrell W.
Fujitsu Limited
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