Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Patent

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Details

365207, 365900, G11C 1300

Patent

active

052511758

ABSTRACT:
A readout column gate comprises two [2] nMOS transistors. These nMOS transistors connect with corresponding bit lines at their respective gates, with corresponding data buses at their respective drains, and with common readout column selection line at their respective sources. The column driver sets the voltage of the readout column selection line to a voltage different than the voltage precharged to the bit lines when a column is selected. The improved readout column gate expedites a DRAM access without incurring an increase in the size of a chip area.

REFERENCES:
patent: 4653029 (1987-03-01), Sato
patent: 4984206 (1991-01-01), Komatsu et al.

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