Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1990-03-05

1991-01-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

3652256, 307530, G11C 1134

Patent

active

049842072

ABSTRACT:
A sense amplifier in a semiconductor memory device comprising a differential pair of bipolar transistors whose bases are supplied with read signals appearing on a pair of common data lines pulled up to the side of a positive power source potential, a regulated current circuit which causes a constant current to flow from the common emitters of the pair of bipolar transistors, as well as regulated current circuits which bias the respective bases of the pair of bipolar transistors to the side of a negative power source potential, and a control circuit which switches and controls the respective regulated current circuits in accordance with the select state of the sense amplifier, and also comprising saturation preventive circuits which cause minute currents to flow from the respective bases of the pair of bipolar transistors toward the negative power source potential, so that the bipolar transistors are avoided from falling into saturated states when the regulated current circuits are turned "off," thereby making it possible to reduce the average power consumption of the memory device without delaying the operating speed thereof.

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J. Miyamoto et al., "A 28ns CMOS SRAM with Bipolar Sense Amplifiers", IEEE Internation Solid-State Circuits Conference, Digest of Technical Papers 1984, pp. 224-225.

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