Static information storage and retrieval – Read/write circuit – Testing
Patent
1992-01-23
1993-08-24
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Testing
36523005, 36523009, 36523001, 371 211, 371 401, G11C 1300, G11C 700
Patent
active
052395090
ABSTRACT:
A semiconductor memory device having: a RAM port for randomly accessing a memory cell array having memory cells disposed in matrix; a SAM port for serially accessing data of one row of the memory cell array; a mode switching unit for switching the operation mode of the SAM port between an ordinary data output mode and a test mode, upon externally receiving a mode switching signal; and an address pointer outputting unit for outputting an address pointer of the SAM port when the operation mode is switched to the test mode by the mode switching unit.
REFERENCES:
patent: 5079747 (1992-01-01), Nakada
patent: 5097447 (1992-03-01), Ogawa et al.
Ikawa Tatsuo
Ohshima Shigeo
Kabushiki Kaisha Toshiba
LaRoche Eugene R.
Nguyen Viet Q.
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