Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1994-04-25

1995-07-25

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Simultaneous operations

36518907, 36523005, 365233, G11C 700

Patent

active

054368634

ABSTRACT:
A semiconductor memory device includes a first RAM, a second RAM, a comparator, and an AND circuit. The first RAM simultaneously performs read and write operations in synchronism with a clock signal on the basis of write address data and read address data which is different from the write address data. The second RAM receives data identical to data input to the first RAM and simultaneously performs read and write operations in synchronism with a clock signal on the basis of write and read address data which are set independently of each other. The comparator compares read and write address data supplied to the second RAM and outputs a coincidence signal when the two address data coincide with each other. The AND circuit prevents destruction of stored data in the second RAM by stopping the input of a clock signal to the second RAM in accordance with the coincidence signal from the comparator.

REFERENCES:
patent: 5031146 (1991-07-01), Umina
patent: 5319596 (1994-06-01), Kogure
patent: 5321652 (1994-06-01), Ito

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