Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1983-03-23
1987-01-06
Heckler, Thomas M.
Static information storage and retrieval
Read/write circuit
Bad bit
371 10, G11C 1140
Patent
active
046352325
ABSTRACT:
A semiconductor memory device is disclosed, which comprises a main memory, a decoder for selecting the main memory, an auxiliary memory, transistors connected between the auxiliary memory and the decoder for selecting the auxiliary memory according to the output of the decoder, and circuits for controlling the transistors. The transistors render the main memory inoperative when the auxiliary memory is rendered operative.
REFERENCES:
patent: 4365319 (1982-12-01), Takemae
patent: 4392211 (1983-07-01), Nakano et al.
patent: 4485459 (1984-11-01), Venkateswaran
patent: 4538245 (1985-08-01), Smarandoiu et al.
Kokkonen et al., "Redundancy Techniques for Fast Static RAMs", ISSCC Digest of Technical Papers, pp. 80-81, Feb. 18, 1981.
Iwahashi Hiroshi
Masuoka Fujio
Heckler Thomas M.
Tokyo Shibaura Denki Kabushiki Kaisha
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