Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Semiconductive

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36518912, 365194, 365221, 365240, G11C 1134

Patent

active

057151920

ABSTRACT:
A plurality of static memory cells including CMOS flip-flops and switching MOS transistors are connected in series, thereby forming a memory cell unit in which one end of data reading is connected to bit lines. A series of the memory cell units are arranged, thereby forming a memory cell array. Reset terminals are provided for releasing cell data and causing the cell to function temporarily as a transfer gate of data.

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patent: 5058065 (1991-10-01), Diluna
patent: 5060194 (1991-10-01), Sakui et al.
patent: 5309393 (1994-05-01), Sakata et al.
IEEE International Solid-State Circuits Conference, Feb. 1986, Nobumichi Okazaki, et al., "A 30ns 256K Full CMOS SRAM", pp. 204-205.

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