Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1996-11-21
1998-04-14
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
365229, 365233, G11C 1300
Patent
active
057401187
ABSTRACT:
A semiconductor memory device is disclosed that reduces a consumed current in a standby mode including a self-refresh mode. In one aspect of the invention, a semiconductor memory device includes a row-system circuit for receiving a first power from a power supply and operable in accordance with a row address strobe signal, a column-system circuit operable in accordance with a column address strobe signal, and a switch circuit that is connected to the column-system circuit. This switch circuit receives the first power from the power supply and supplies the first power to the column-system circuit in an active mode and produces a second power lower than the first power and supplying the second power to the column-system circuit in a standby mode.
REFERENCES:
patent: 5463588 (1995-10-01), Chonan
Ishida Yoshiyuki
Sato Hajime
Fears Terrell W.
Fujitsu Limited
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