Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-12-12

1998-04-14

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365149, 365203, G11C 700

Patent

active

057401136

ABSTRACT:
A semiconductor device constituted by a booster circuit, memory cell arrays, a sense amplifier circuit, transmission gate circuits, equalizing circuits and a control circuit applying a boosted potential respectively to the gates of MOS transistors of the transmission gate circuits and the equalizing circuits when no memory cells of the memory cell arrays are selected whereby the capacitance of de-coupling capacitors connected to output terminals of the booster circuit can be reduced thereby contributing to reduction in chip area.

REFERENCES:
patent: 4947377 (1990-08-01), Hannai
patent: 5237534 (1993-08-01), Tanaka et al.
patent: 5291437 (1994-03-01), Rountree
patent: 5402378 (1995-03-01), Min et al.

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