Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2010-10-22

2011-12-06

Lappas, Jason (Department: 2827)

Static information storage and retrieval

Read/write circuit

Particular write circuit

C365S145000

Reexamination Certificate

active

08072823

ABSTRACT:
A semiconductor memory device includes a memory cell provided at an intersection of a word line and a bit line, a precharge circuit connected to the bit line, a column select circuit controlled in accordance with a write control signal, and a clamp circuit provided as a write circuit. The clamp circuit includes a transistor configured to control the potential of a selected bit line to a first potential (e.g., 0 V), and a variable capacitor configured to control the potential of the selected bit line to a second potential (e.g., a negative potential) which is lower than the first potential. The capacitance of the variable capacitor decreases when a power supply voltage is increased, whereby the amount of a decrease from the first potential to the second potential is reduced.

REFERENCES:
patent: 7139187 (2006-11-01), Suzuki
patent: 2003/0185043 (2003-10-01), Masuda
patent: 2006/0262635 (2006-11-01), Kanehara
patent: 2002-298586 (2002-10-01), None
patent: 2005-071491 (2005-03-01), None
patent: 2006-323950 (2006-11-01), None

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