Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2009-09-03

2011-10-25

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S189140, C365S189150, C365S189160, C365S193000, C365S195000, C365S222000, C365S233140, C365S233160, C365S233170, C365S233190

Reexamination Certificate

active

08045357

ABSTRACT:
A memory includes a memory cell array including destructive read-out type memory cells; a decoder selecting a cell; a sense amplifier configured to detect the data; and a read and write controller controlling a read operation and a write operation, wherein the read and write controller outputs a logical value of a write enable signal at the start of the read operation in a first period and makes the write enable signal invalid after the read operation starts during the first period, on the basis of the write enable signal and a restore signal keeping an activated state during the first period, the write enable signal being a signal allowing the write operation, the first period being a period from when the read operation starts to when a restore operation for writing the data back to the memory cell is completed.

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Explanation of Non-English Language References in 2 pages.

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