Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2011-02-15

2011-11-22

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including signal clamping

C365S051000, C365S063000, C365S153000, C365S163000

Reexamination Certificate

active

08064272

ABSTRACT:
A semiconductor memory device comprises a plurality of memory layers arranged in multilayer, each memory layer including a cell array, the cell array containing a plurality of first parallel lines, a plurality of second parallel lines arranged crossing the first lines, and a plurality of memory cells connected at intersections of the first lines and the second lines; a pulse generator operative to generate pulses required for data access to the memory cell; and a control means operative to control the pulse generator such that the pulse output from the pulse generator has energy in accordance with the memory layer to which the access target memory cell belongs.

REFERENCES:
patent: 6954394 (2005-10-01), Knall et al.
patent: 2003/0123277 (2003-07-01), Lowrey et al.
patent: 2006/0028886 (2006-02-01), Choi et al.
patent: 2006/0197115 (2006-09-01), Toda
patent: 2007-129041 (2007-05-01), None
patent: 2007-149170 (2007-06-01), None

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