Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2009-07-02

2011-12-06

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

Reexamination Certificate

active

08072798

ABSTRACT:
The semiconductor memory device includes: an inverter pair of a cross-coupled first and second inverters; a first transfer transistor including a front gate and a back gate connected to a first node to which an output terminal of the first inverter and an input terminal of the second inverter are connected; a second transfer transistor including a front gate and a back gate connected to a second node to which an output terminal of the second inverter and an input terminal of the first inverter are connected; a driver transistor whose gate is connected to the second node; and a read transistor including a front gate, a back gate connected to the second node, and a current path whose one end is connected to one end of a current path of the driver transistor.

REFERENCES:
patent: 7123504 (2006-10-01), Yabe
patent: 2005/0232058 (2005-10-01), Yabe
patent: 2006/0227595 (2006-10-01), Chuang et al.
patent: 2007/0183185 (2007-08-01), Guo et al.
patent: 2007/0279966 (2007-12-01), Houston
“FinFET SRAM with Enhanced Read/Write Margins”, A. Carlson et al., 2006 IEEE International SOI Conference Proceedings pp. 105-106.

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