Static information storage and retrieval – Read/write circuit – Particular write circuit
Reexamination Certificate
2006-06-23
2010-12-07
Dinh, Son (Department: 2824)
Static information storage and retrieval
Read/write circuit
Particular write circuit
C365S063000, C365S189140, C365S185180
Reexamination Certificate
active
07848161
ABSTRACT:
A semiconductor memory device comprising a memory cell array of cross-point type having memory cells each composed of a variable resistive element for storing information in the form of variation of the electrical resistance. The operating current in the programming operation is reduced. Main data lines (GDL0to GDL7) for supplying predetermined data line voltages to each of the corresponding data lines (DL0to DL7) of the memory cell arrays (BK0to BK3) arranged at least in the row direction extend in the row direction and are connected to the corresponding data lines (DL0to DL7) through individual data line selecting transistors (TD0kto TD7k) in the memory cell arrays (BK0to BK3). The number of data lines (DL0to DL7) of the memory cell arrays (BK0to BK3) is equal to the largest number of memory cells in which data is simultaneously programmed in one write operation.
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Chen et al.: “An Access-Transistor-Free (0T/1R) Non-Volatile Resistance Random Access memory (RRAM) Using a Novel Threshold, Switching, Self-Rectifying Chalcogenide Device”, Electron Devices Meetings, 2003, IEDM '03 Technical Digest, IEEE International.
Dinh Son
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
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