Semiconductor memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S752000, C714S758000

Reexamination Certificate

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07836377

ABSTRACT:
A semiconductor memory device has a built-in error detection and correction system, wherein the error detection and correction system is formed to have a cyclic code, with which multiple error bits are correctable, and wherein the cyclic code is configured in such a manner that a certain number of degrees are selected as information bits from the entire degree of an information polynomial having degree numbers corresponding to an error-correctable maximal bit number, the certain number being a number of data bits which are simultaneously error-correctable in the memory device.

REFERENCES:
patent: 4509172 (1985-04-01), Chen
patent: 4556977 (1985-12-01), Olderdissen et al.
patent: 5107503 (1992-04-01), Riggle et al.
patent: 6185134 (2001-02-01), Tanaka
patent: 7076722 (2006-07-01), Shibata
patent: 7096313 (2006-08-01), Chang et al.
patent: 2006/0239073 (2006-03-01), Toda
U.S. Appl. No. 11/845,999, filed Aug 28, 2007, Toda.

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