Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-12-22

2009-10-27

Nguyen, Dang T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S208000, C365S104000

Reexamination Certificate

active

07609572

ABSTRACT:
In a semiconductor memory device, with respect to low voltage application, technique of controlling a gate voltage of a shared MOS transistor increasing sense speed and increasing data read speed by preventing data inversion caused by noise and reducing bit line capacitance during sensing is provided. By a shared MOS transistor gate voltage control circuit connecting a sense amplifier and a memory cell array, a shared MOS transistor gate voltage (SHR) is lowered in two stages and bit line capacitance to be amplified is reduced taking noise during the sensing into consideration so that the sense speed is increased. Therefore, a timing of activating a column selection signal can be hastened and as a result, data read time can be reduced.

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