Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-02-28

2009-10-06

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S049120

Reexamination Certificate

active

07599207

ABSTRACT:
A ferroelectric memory cell array has 1T/1C memory cells disposed in matrix form. An address storage unit stores threshold memory addresses for dividing the array into a first block for causing each memory cell to store one-bit data for each memory cell and a second block for causing each memory cell pair to store one-bit data for each memory cell pair. An address comparator compares column addresses corresponding to memory addresses with the threshold memory addresses and determines whether each of the memory addresses belongs to either the first or second blocks. An address switching unit controls drivers so that when it is determined that the memory address belongs to the first block, only corresponding word and plate lines are activated and when it is determined that the memory address belongs to the second block, only corresponding word and plate line pairs are activated.

REFERENCES:
patent: 7120042 (2006-10-01), Takahashi
patent: 7274608 (2007-09-01), Takahashi
patent: 10-79196 (1998-03-01), None
patent: 2004-234788 (2004-08-01), None

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