Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-08-06
2009-08-11
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S230030
Reexamination Certificate
active
07573767
ABSTRACT:
A semiconductor memory device of the invention comprises unit blocks into which the memory cell array is divided, rows of sense amplifiers arranged at one end and the other end of the plurality of bit lines in the unit block, switch means for switching a connection state between the unit block and the row of sense amplifiers attached to the unit block; and control means for controlling the switch means so as to form a transfer path from the row of sense amplifiers attached to a predetermined the unit block leading to the row of sense amplifiers as a saving destination not attached to the predetermined the unit block. This row of sense amplifiers attached to the predetermined the unit block functions as a cache memory.
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Japanese Office Action dated Jul. 22, 2008.
Elpida Memory Inc.
McGinn IP Law Group PLLC
Phung Anh
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