Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2007-12-19
2009-08-25
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S154000
Reexamination Certificate
active
07580317
ABSTRACT:
A semiconductor memory circuit includes first and second bit lines making a first pair, third and fourth bit lines making a second pair, a memory cell having a first inverter coupled between the first pair, a second inverter coupled between the second pair, a third inverter coupled between first and third bit lines and a fourth inverter coupled between second and fourth bit lines. The memory cell further includes a first access switch inserted between first bit line and the first inverter, second access switch inserted between second bit line and the second inverter, third access switch inserted between third bit line and the third inverter and fourth access switch inserted between fourth bit line and the fourth inverter.
REFERENCES:
patent: 5477489 (1995-12-01), Wiedmann
patent: 6430083 (2002-08-01), Lu et al.
patent: 6999372 (2006-02-01), Takayanagi
patent: 7042792 (2006-05-01), Lee et al.
patent: 5-299621 (1993-11-01), None
patent: 2005-346837 (2005-12-01), None
McGinn IP Law Group PLLC
NEC Electronics Corporation
Phung Anh
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