Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-05-11

1996-11-19

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Including signal clamping

365182, G11C 1300

Patent

active

055769985

ABSTRACT:
An object of the present invention is to provide a semiconductor memory device having a function to efficiently limit a voltage amplitude of an I/O line pair 4 to protect cell data from destruction even when multiple selection, etc., occurs at a column gate 3. A semiconductor memory device 1 constituted by DRAM, etc., for transferring cell data amplified by a sense amplifier 2 to an I/O line pair 4 through a transfer gate 3, comprises an amplitude limiting means 5 for limiting the amplitude of a voltage, provided to the I/O line pair 4 in activation, wherein the amplitude limiting means 5 includes a first amplitude limiting circuit 51 having a predetermined operating range and a second amplitude limiting circuit 52 having an operating range different from the operating range of the first amplitude limiting circuit 51.

REFERENCES:
patent: 5504704 (1996-04-01), Sato et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-546229