Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-08-21

2009-12-01

Nguyen, Dang T (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S154000, C365S230050

Reexamination Certificate

active

07626855

ABSTRACT:
Obtained is a highly-reliable non-volatile memory without increasing the area of a memory cell or adding a step to a CMOS process. The non-volatile memory includes an SRAM cell configured of 6 MOS transistors, a first word line electrically connected to the gate of a first transfer MOS transistor, and a second word line electrically connected to the gate of a second transfer MOS transistor. During a write operation of a first PMOS transistor, a drive circuit applies a positive voltage whose absolute value is not larger than a junction breakdown voltage to an n-type well as well as the sources of first and second PMOS transistors, concurrently applying the positive voltage to the first word line and a ground voltage to the second word line and a first data line.

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